RELOCATION ASSISTANCE: Relocation assistance may be availableCLEARANCE TYPE: Secret
TRAVEL: Yes, 10 of the Time
Description
At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact peoples lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nations history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work — and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, theyre making history.
Northrop Grumman Aeronautics Systems has an opening for a Sr. Principal Firmware Engineer to join our team of qualified, diverse individuals within our Software organization located in Rancho Bernardo, CA.
As an FPGA design engineer you will design, implement and verify HDL to manage I/O devices on embedded computers in a new avionics’ product line. In collaboration with the product architect, electrical designers, software engineers and systems engineers you will develop requirements, define HW/SW interfaces and determine verification approaches. You will establish integrated product development workflows, processes and tools to reduce time to spanet for our safety critical avionics designs.
Responsibilities:
FPGA Architecture & Design
Define FPGA architecture and logic design to support avionics computer functions
Translate system and board-level requirements to detailed FPGA requirements and design specifications
Collaborate with the Product Architect to partition system functionality between hardware, firmware and software
HDL Coding & Implementation
Develop synthesizable HDL code for FPGA-based designs
Implement interfaces such as PCIe, SPI, I2C, UART, Ethernet and Serial
Simulation, Verification and Validation
Create comprehensive test benches and simulation environment to verify FPGA
Perform functional, timing and synthesis-level simulations to ensure deterministic and reliable operation
Support hardware-in-the-loop and system-level integration testing with embedded processors and avionics systems
Participate in formal verification and validation activities
Synthesis, Place & Route, and Timing Closure functionality
Perform synthesis, implementation and timing closure using Vivado
Optimize resource utilization, power consumption, and performance through iterative design and analysis
Generate and review timing constraints to ensure reliable performance across all environmental conditions
Basic Qualifications:
Basic qualifications for a Sr. Principal Engineer include a Bachelors in Science, Technology, Engineering or Math (STEM) and at least 8 years of experience, a Masters Degree in STEM with 6 years of experience, or a PhD Degree with 3 years of experience
Digital circuit design experience, including simulation & schematic capture through test and integration
Prior hands-on prototyping and debug experience testing complex digital subsystems, such as complex circuit card development involving FPGAs, and/or embedded processors, and/or high-speed interfaces
Experience with AMD FPGAs and the Vivado tool
Experience with OVM/UVM Verification methodologies
Demonstrated ability to translate system performance and operational specifications into hardware requirements, design, and test specifications
Experience facilitating internal and customer collaboration to capture and enhance engineering artifacts
Demonstrated experience with the full product life cycle (requirements, design, implementation, and test)
Preferred Qualifications:
Primary Level Salary Range: $142,200.00 - $213,400.00
The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidates experience, education, skills and current spanet conditions.
Depending on the position, employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.
The application period for the job is estimated to be 20 days from the job posting date. However, this timeline may be shortened or extended depending on business needs and the availability of qualified candidates.
Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO and pay transparency statement, please visit http://www.northropgrumman.com/EEO. U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions.